low capacitance tvs array 1 05018.r7 2/07 www.protekdevices.com lcd05c thru lcd24c applications ? ethernet - 10/100 base t ? rs-458 ? xdsl & atm ? scsi & usb ? audio/video i/o ports iec compatibility (en61000-4) ? 61000-4-2 (esd): air - 15kv, contact - 8kv ? 61000-4-4 (eft): 40a - 5/50ns ? 61000-4-5 (surge): 24a, 8/20s level 2 (line-ground) & level 3 (line-line) features ? 800 watts peak pulse power per line (tp=8/20s) ? bidirectional configuration ? esd protection > 40 kilovolts ? available in 5 voltage types: 5v to 24v ? standard dual-in-line package ? protects up to 8 lines ? low capacitance: 15pf ? rohs compliant mechanical characteristics ? molded 16 pin dual-in-line (dip) package ? weight 1.2 grams (approximate) ? available in lead-free pure-tin plating(annealed) ? solder reflow temperature: pure-tin - sn, 100: 260-270c ? consult factory for leaded device availability ? flammability rating ul 94v-0 ? packaging: 25 pieces per tube ? marking: logo, part number, date code & pin one defined by dot on top of package 05018 pin configuration 16 pin dip
lcd05c thru lcd24c 2 05018.r7 2/07 www.protekdevices.com device characteristics operating temperature symbol v alue -55 to 150 c c -55 to 150 units t l t stg parameter storage temperature peak pulse power (t p = 8/20s) - see figure 1 p pp 800 watts maximum ratings @ 25c unless otherwise specified note 1: tested on pin pairs 1 & 16, 2 & 15, 3 &14, 4 & 13, 5 & 12, 6 & 11, 7 & 10 and 8 & 9. part number (see note 1) rated stand-off voltage v wm volts maximum clamping voltage (see fig. 2) @ i p = 1a v c volts maximum clamping voltage (see fig. 2) @8/20s v c @ i pp maximum leakage current @v wm i d a temperature coefficient of v (br) qv (br) mv/c lcd05c lcd08c LCD12C lcd15c lcd24c 5.0 8.0 12.0 15.0 24.0 9.8 12.3 19.0 25.5 40.0 24v @ 45a 25.5v @ 40a 32v @ 34a 38v @ 27a 48v @ 22a 100 10 4 4 4 3 9 16 17 26 maximum capacitance 0v @ 1 mhz c pf 15 15 15 15 15 minimum breakdown voltage @ 1ma v (br) volts 6.0 8.5 13.3 16.7 26.7 electrical characteristics per line @ 25c unless otherwise specified 0 5 10 15 20 25 30 t - time - s 0 20 40 60 80 100 120 i pp - peak pulse current - % of i pp test waveform parameters t f = 8s t d = 20s t f peak value i pp e -t t d = t i pp /2 figure 2 pulse wave form 0.1 1 10 100 1,000 10,00 0 t d - pulse duration - s 800w 8/20s waveform 10 100 1,000 10,000 p pp - peak pulse power - watts figure 1 peak pulse power vs pulse time
3 05018.r7 2/07 www.protekdevices.com lcd05c thru lcd24c graphs 0 25 50 75 100 125 150 t l - lead temperature - c 20 40 60 80 100 % of rated power peak pulse power 8/20s average power figure 3 power derating curve 0 figure 5 typical clamping voltage vs peak pulse current for lcd05c 18 16 12 8 4 0 16 14 12 10 024 8 6 v c - clamping voltage - volts figure 4 overshoot & clamping voltage for lcd05c esd test pulse: 12 kilovolt, 1/30ns (waveform) 5 volts per division -15 -5 5 15 25 i pp - peak pulse current - amps
lcd05c thru lcd24c 4 05018.r7 2/07 www.protekdevices.com application note the lcd series are low capacitance, bidirectional tvs arrays that are designed to protect i/o or high speed data lines from the damaging effects of esd or eft. this product series has a surge capability of 800 watts p pp per line for an 8/20s waveshape and offers esd protection > 40kv. bidirectional common-mode configura tion (figure 1) ideal for use in usb applications, the lcd series provides up to eight (8) lines of protection in a common-mode configuration a s depicted in figure 1. circuit connectivity is as follows: ? pins 2, 3, 4, 5, 6, and 7 are connected to ground. ? pins 15 and 14 connected to port #1 d- and d+. ? pins 13 and 12 connected to port #2 d+ and d-. ? pins 11 and 10 connected to port #3 d+ and d-. circuit board la yout recommenda tions circuit board layout is critical for electromagnetic compatibility (emc) protection. the following guidelines are recommended: ? the protection device should be placed near the input terminals or connectors. by placing the tvs close to the connectors, the device will divert the transient current immediately before it can be coupled into the nearby traces. ? the path length between the tvs devices and the protected line should be minimized ? all conductive loops including power and ground loops should be minimized ? the transient current return path to ground should be kept as short as possible to reduce parasitic inductance. ? ground planes should be used whenever possible. for multilayer pcbs, use ground vias. figure1. typical common- mode usb protection circuit d+ d- usb output connector d+ d- d- d+ usb output connector usb ic usb output connector usb output connector d+ d- 34 2 1 58 7 6 16 15 14 13 12 1 1109 port #1 port #2 port #4 port #3
5 05018.r7 2/07 www.protekdevices.com lcd05c thru lcd24c 16 pin dip package outline & dimensions copyright ? prot ek devices 2007 specifications: protek reserves the right to change the electrical and or mechanical characteristics described herein without notice (except jedec). design changes: protek reserves the right to discontinue product lines without notice, and that the final judgement concerning selection and specifications is the buyer?s and that in furnishing engineering and technical assistance, protek assumes no responsibility with respect to the s election or specifications of such products. protek devices 2929 south fair lane, tempe, az 85282 tel: 602-431-8101 fax: 602-431-2288 e-mail: sales@protekdevices.com web site: www.protekdevices.com outline & dimensions: rev 1 - 11/01, 06003 bulk ordering nomenclature: 1. no suffix = product shipped in tubes of 25 pcs per tube. 2. suffix - lf = lead-free, pure-tin plating, i.e., lcd05c-lf. package outline a b c d e f g h i j k l 19.8 7.87 6.60 0.50 10 - 5.08 - 1.78 0.84 typ 0.53 2.54 typ - 0.290 0.240 0.010 0 0.020 - 0.125 - 0.033 typ 0.015 0.100 typ 0.780 0.310 0.260 0.020 10 - 0.200 - 0.070 0.033 typ 0.021 0.100 typ - 7.37 6.10 0.25 0 0.51 - 3.17 - 0.84 typ 0.38 2.54 typ dim min max min max millimeters inches dimensions 16 pin dip notes: 1. dimensions are exclusive of mold flash and metal burrs.
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